"Eye" Know How
The Gigabit Challenge!
As many interfaces are reaching gigabit data rates signal integrity is getting more and more critical. Various different parasitic effects are going to disturb signal quality so that the receiving chip is not able to recognize the databit sent by the transmitting device. Some effects are:
- Inter Symbol Interference (ISI)
- Cross Talk
- Impedance Mismatch between Driver (TX), PCB routing and Receiver Termination (RX)
- Point to Multi Point Topologies
- Power/Ground Noise
- It gets impossible to predict signaling performance just from experience.
To ensure a “First Time Right” design, simulations need to be done. And the result, quite often a data eye, needs to be evaluated carefully and a Timing Budget has to be calculated. In case there is enough margin this result can also be used to reduce cost in case design guides are too conservative or just do not fit in your environment.
However, it is very expensive to invest in software and manpower needed to master the Gigabit Challenge. There is no need for this invest if you have a partner who has the “Eye” KnowHow!
Most recent downloads
The following file downloads are the two files made available most recently. You can view and download more files at our downloads section.
- Conference Paper on Embedded World 2014
- This is the presentation for the Paper "Jitter in PCIe application on embedded boards with PLL Zero delay Clock buffer" presented on the Conference at Embedded World 2014 in Nuremberg
- Date: 2014-03-01 / File size: 1.9 MB
- Company Presentation 2014
- This is a short overview on the Services provided by EyeKnowHow!
- Date: 2014-03-01 / File size: 2.8 MB
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