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Teledyne LeCroy Memory Verification

DDR test setup

In order to verify functionality of any DDR or LPDDR interface it is recommended to perform electrical validation measurement testing, as outlined by the JEDEC memory specification.

Teledyne LeCroy provides multiple tools for DDR Testing (Virtual Probe, DDR Debug Toolkit, and QPHY Automation Compliance Testing). These tools provide a wide range of tools for different situations. Compliance offers repeatability in measurement and DDR Debug offers a tool that can pause on failures to assist in root-causing issues:

  • Debug uses Multiple Viewing areas
  • Logic Analysis for decode & trigger of the JEDEC command truth table
  • Eye & Mask testing
  • Wide range of JEDEC measurements
  • Automation Testing with PDF Pass/Fail reports

EyeKnowHow provides a wide range of services to help assist users in this space:

  • Serve with memory interposer for different memory generations
  • Help troubleshoot and root-cause JEDEC testing failures
  • Check and judge customer generated test reports
  • Help during compliance testing measurement setup
  • Execute a complete verification measurement

For memory there is no “official” compliance test, but Teledyne LeCroy supports engineers with tools like DDR-Debug and QualiPHY to verify memory interfaces.

EyeKnowHow has the experience to execute the tests and evaluate the results based on engineering KnowHow

  • DDR5 x4/x8 interposer
  • DDR5 interposer on SO-DIMM
  • DDR5 interposer on U-DIMM



Hermann Ruckerbauer

Itzlinger Stra├če 21a
94469 Deggendorf

Phone: +49 991 29692905
Fax: +49 991 98158793
Mobile: +49 176 78778777